ALU logic functions

Day 36

     Today we'll be breaking down the logic block of the ALU, but first a word on the build I still haven't gotten the clock finished though not due to any real difficulty other than a lack of time. should be getting it finished soon but no distinct timeline as of yet.

     The logic block contains 2 inputs in the form of the B & C registers and preforms several functions on those inputs simultaneously the only thing that determines what is gated onto the bus is the enable circuits for each function. each bit of the logic block contains 2 relays using a total of 16 relays to preform the NOT "B", AND, OR , and XOR functions. There is an unused switch in the logic block and I may put it to use as a NOT "C" function to further reduce cycle counts for functions that may need to NOT 2 numbers back to back, but I am unsure if it has any real benefit yet so for now it is tabled.

Not Function

 The NOT function takes the input from the B register which is inputted to the coil and simply outputs the opposite. Thus if B is high it energizes the coil drawing the contact away from the NOT output forcing it LOW but if B is low the coil gets no power and the switch passes a voltage or HIGH signal through to the output.
 

AND Function 

The AND function takes the inputs of B & C and only goes high when both are high. the ingenious part of this circuit is that the B side is drawn from the N/O contact from the NOT switch then put into the N/O of S1 on the C relay and the common of S1 is fed as the output of the AND function.

OR Function

The OR function takes B & C and will read high if either of them or both of them are high. It's operation is simply taking the N/O contact on 1 switch for each input and combining them into a single output.

XOR and completed logic block

The XOR function is the last of the functions from Harry Porters design it is similar to the OR function with the exception that it will read low if both inputs are high. This function is accomplished by taking the N/O of a switch on B and connecting it to the N/C of a C switch and the N/C from B to the N/O on C this means if either relay is energized a path from the V supply on the B switch will lead to the output but if both are high then it will break the connection.

     The 2 switches that are left may remain that way but between the NOT "C" function and possibly adding a NAND function I have a feeling they will get used up at least partially. The NAND would be the priority as NAND gates can be used in a multitude of different ways and would afford whole new functionalities.